ITEC40081 - Digital Control - Define the steady state error

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Assessment Requirements

In this course work (CW) you may use the concepts you learned during your lectures and your laboratory works together with your ability in performing further research in bringing more details if necessary.

Assessment Details

1. This exercise shows the PID Controller tuning in MATLAB and Simulink, for DC Motor control. Download this Simulink file "dcintrocomplete.mdl" form the contents in NOW.

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Then, open the PID tuner AutotunerPID to tune the controller parameters.

Change the parameters until you achieve the following performance specifications:
- Maximum overshoot ≤ 6%
- Maximum rise time < 0.35s
- Maximum setting time < 1.10s
- Gain margin > 29 dB
- Phase margin > 67
- Explain the differences between the outputs of the initial and the modified system.

2. Define the steady state error for control systems. Then, find the steady state error for the following system when the input is (a) unit step, (b) ramp function, and (c) parabola.

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3. A typical hard disk drive actuator can be modelled quite accurately as a double integrator:

G(s) = Y(s)/U(s) = (6 x 107)/S2

where y is the displacement of the read/write head in micrometre and u is the actuator input in volts. The sampling used in a typical hard disk drive servo system is 10 kHz. It is required to design an appropriate controller so the resulting closed-loop system has an overshoot less than 25% and a settling time less than 8 milliseconds as the response to a step reference of 1 micrometer. Design a digital PD, PI, or PID controller to meet the above design specifications using the emulation based method. Show all the detailed design procedure and the results of your simulations using MATLAB and Simulink.

4. Convert (manually) the following digital transfer function into its state space representation:

G(z) = (0.8z2 - z +1)/(z2 - 1.2z +0.4)

Provide the detail derivations and the values of state space parameter matrices. Then, use MATLAB to verify your answers.

5. Consider the system in question 1. The sampling rate is again chosen to be 10 kHz. It is required to design an appropriate compensator such that the resulting closed-loop system has an overshoot less than 25% and a settling time less than 8 milliseconds as well as a steady state error to be less 1% due to a step reference of 1 micrometer. Can you design a digital lead compensator that would achieve the above design specifications? If your answer is yes, please give your solutions together with all detailed derivations and simulation results. If your answer is no, please give your reasons together with detailed justifications. Use MATLAB and SIMULINK wherever possible.

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